SMART develops commercially viable manufacturing of integrated silicon III-V chips, available by 2020

The Singapore-MIT Alliance for Research and Technology (SMART), Massachusetts Institute of Technology’s Research Enterprise in Singapore, says it has developed a commercially viable way to manufacture integrated silicon III-V chips with high-performance III-V devices inserted into their design.

“By integrating III-V into silicon, we can build upon existing manufacturing capabilities and low-cost volume production techniques of silicon and include the unique optical and electronic functionality of III-V technology,” says SMART’s CEO & director Eugene Fitzgerald. “The new chips will be at the heart of future product innovation and power the next generation of communications devices, wearables and displays,” he adds.

“However, integrating III-V semiconductor devices with silicon in a commercially viable way is one of the most difficult challenges faced by the semiconductor industry, even though such integrated circuits have been desired for decades,” says Kenneth Lee, senior scientific director of the SMART Low Energy Electronic Systems (LEES) research program. “Current methods are expensive and inefficient, which is delaying the availability of the chips the industry needs,” he adds. “With our new process, we can leverage existing capabilities to manufacture these new integrated silicon III-V chips cost-effectively and accelerate the development and adoption of new technologies that will power economies.”

The new technology developed by SMART builds two layers of silicon and III-V devices on separate substrates and integrates them vertically together within a micron. The process can use existing 200mm manufacturing tools, allowing semiconductor manufacturers to make new use of their existing equipment. Currently, the cost of investing in a new manufacturing technology is tens of billions of dollars, so the new integrated circuit platform is highly cost-effective and can result in much lower-cost novel circuits and electronic systems, says SMART.

SMART is focusing on creating new chips for pixelated illumination/display and 5G markets (a combined potential market of over US$100bn). Other potential markets include wearable mini-displays, virtual reality (VR) applications, and other imaging technologies.

The patent portfolio has been exclusively licensed by SMART’s Singapore-based spin-off New Silicon Corporation Pte Ltd (NSC), which is reckoned to be the first fabless silicon IC firm with proprietary materials, processes, devices and design for monolithic integrated silicon III-V circuits.

SMART’s new integrated silicon III-V chips will be available next year and expected to be in products by 2021.

See related items:

IQE delivers 200mm GaN-on-Si HEMT wafers to Singapore-MIT LEES next-generation CMOS program

LEES project aims to integrate optical and electronic components on a chip, using III-V-on-Si technology

Tags: III-V-on-silicon

Visit: www.new-silicon.com

Visit: http://smart.mit.edu