Imec reports first direct growth of 2D materials on 300mm wafers

At the IEEE’s 64th International Electron Devices Meeting (IEDM 2018) in San Francisco, CA, USA (1-5 December), nanoelectronics research centre imec of Leuven, Belgium presented a 300mm-wafer platform for metal-oxide-silicon-field-effect-transistor (MOSFET) devices with 2D materials.

Two-dimensional materials could provide the path towards extreme scaling of device dimensions as they are atomically precise and suffer little from short-channel effects. Other possible applications of 2D materials could come from using them as switches in the back-end-of-line (BEOL), which puts an upper limit on the allowed temperature budget in the integration flow.

The imec platform integrates a transistor channel composed of tungsten disulfide (WS2), a 2D material that holds promise for higher ON-current compared with most other 2D materials as well as good chemical stability. Imec’s work reported at IEDM represents the first metal-organic chemical vapor deposition (MOCVD) growth of WS2 on 300mm wafers. The MOCVD synthesis approach results in thickness control with monolayer precision over the full 300mm wafer, as well as potentially the highest-mobility material. However, the benefits of MOCVD growth come at the price of a high temperature while growing the material.

To build a device integration flow that could be compatible with BEOL requirements, the transfer of the channel material from a growth substrate to a device wafer is crucial. Imec claims to be first to demonstrate a full 300mm monolayer 2D material transfer, which is said to be very challenging on its own due to the low adhesion of 2D materials to the device wafer and to the exteme thinness of the material transferred (just 0.7nm).

The transfer process was developed together with SUSS MicroTec of Garching near Munich, Germany (which makes photomask aligners, laser processing systems and wafer bonders) and Brewer Science of Rolla, MO, USA (which provides thin-wafer-handling materials, processes and equipment) using temporary bonding and debonding technologies. WS2 wafers are temporarily bonded to glass carrier wafers using a specially formulated material (from Brewer Science). Next, the WS2 monolayer is mechanically debonded from the growth wafer and bonded again in vacuum to the device wafer. The carrier wafer is removed using laser debonding. This debonding technique is a key enabler for the controlled transfer of 2D materials.

“Building the 300mm platform for MOSFET device study with 2D materials and developing the process step ecosystem speeds-up the technological adoption of these materials,” says Iuliana Radu, the Beyond CMOS program director at imec. “Several challenges are still to be resolved and are the subject of ongoing research and development.” Major challenges include scaling the equivalent oxide thickness (EOT) of gate dielectric for 2D materials, and reducing channel defectivity to boost mobility.

Imec’s research into advanced logic scaling is performed in cooperation with imec’s key CMOS program partners including GlobalFoundries, Huawei, Intel, Micron, Qualcomm, Samsung, SK Hynix, Sony Semiconductor Solutions, TOSHIBA Memory, TSMC and Western Digital.

Tags: IMEC Wafer bonding

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