28 January 2015

Soitec launches second generation of eSI RF-SOI substrates, targeting LTE Advanced

Soitec of Bernin, France has introduced its eSI90 substrate, the newest high-end wafer in its radio-frequency silicon-on-insulator (RF-SOI) product family. The eSI90 is designed to improve the RF performance of mobile communication components such as high-linearity switches and antenna tuners that are integrated in high-end smart phones for LTE Advanced networks using carrier aggregation (which enables multiple LTE carriers to be used together, providing higher data rates).

The new wafers comprise Soitec's second generation of eSI substrates, based on engineered high-resistivity (HR) substrates. The firm says that eSI substrates have been widely adopted by leading RF semiconductor companies to address device cost and performance needs for the 3G and 4G/LTE mobile wireless markets. Based on Soitec's Smart Cut technology, eSI products are claimed to be the first 'trap-rich' type of materials in full production (incorporating a trap-rich layer between the high-resistivity handle wafer and the buried oxide, which significantly improves the performance of the finished ICs). The new eSI90 wafer exhibits higher effective resistivity than first-generation eSI wafers, enabling a 10dB improvement in linearity performance in RF front-end modules to address the stringent new requirements of LTE Advanced smart phones.

"Soitec continues to be the innovation frontrunner in RF-SOI substrates for the mobile industry with the introduction of eSI90, enabling high-performance RF devices for LTE Advanced and next-generation smart phones," says Dr Bernard Aspar, senior VP & general manager of Soitec's Communication & Power business unit. "We estimate that more than 1 billion RF devices are produced each quarter using our eSI wafers," he adds.  

Soitec says that it developed a new metrology standard, the harmonic quality factor (HQF), to predict the expected RF linearity of finished ICs. HQF correlates with the second harmonic distortion value of a coplanar waveguide deposited on the substrate. The new eSI90 wafers' HQF maximum value is set to -90dBm compared with -80dBm for first-generation eSI substrates. This lower limit enables chip makers to take advantage of design and process improvements to increase the RF performance of their semiconductor designs and to meet MIMO (multi-input multi-output) and carrier aggregation LTE Advanced requirements, providing faster data connections, claims Soitec.

The firm says that the new eSI90 substrates are already under evaluation at multiple leading chipmakers and foundries. Production-ready samples are now available.

See related items:

Soitec seeing widespread adoption of eSI substrates

Tags: Soitec SOI engineered substrates

Visit: www.soitec.com