3 October 2011

Inphi delivers first 100GbE CMOS PHY solutions for 100G line-cards

Inphi Corp of Sunnyvale, CA, USA, a fabless provider of high-speed analog ICs for the communications and computing markets (using indium phosphide, gallium arsenide, silicon-germanium or silicon bipolar as well as CMOS), has announced the availability of what it claims is the first, lowest-power100 Gigabit Ethernet (GbE) CMOS PHY solutions that support the IEEE 802.3ba standard and target next-generation high-density 100G line-cards. Based on Inphi’s iPHY architecture announced in March, the IN112510 100GbE CMOS gearbox (GB) and IN012525 100GbE CMOS clock data recovery (CDR) chipsets aim to speed time-to-market for higher-aggregate-bandwidth systems while containing costs of next-generation 100GbE line-cards targeted for data center and enterprise networks.

Cost-effective, energy-efficient 100GbE links will soon become essential tools for data center and service provider networks, which are struggling to satisfy the global economy’s hunger for more bandwidth, says Inphi. With service providers and data centers demanding technology with low power consumption, Inphi’s latest iPHY CMOS PHY solutions aim to enable them to easily upgrade to 100GbE networks while retaining a lower carbon footprint. By integrating multiple channels along with transmit and receive functions on a single IC, Inphi says that it can double the levels of integration available from existing 100GbE PHY and CDR offerings.

“Our industry-leading PHY design metrics – power, footprint, integration – position us to use these devices across data center, enterprise and service provider applications,” says Siddharth Sheth, VP of marketing for Inphi’s high-speed connectivity products. “As the market transitions away from the power-hungry and area-intensive SiGe-technology-based CFP modules towards lower-power, higher-density CMOS-based CFP and CFP2 line-cards, Inphi’s PHY offerings will enable and lead that transition,” he reckons.

“Video, rich IP content, streaming media, and bandwidth-hungry mobile and cloud-based enterprise apps are driving massive upgrades of data-center and service provider networks,” says John D’Ambrosia, chair, Ethernet Alliance and past chair, IEEE 802.3ba 40G/100G Ethernet Task Force. “With fat pipes needed to accommodate the tsunami of data generated by these applications, the demand for 100GbE is in the here and now,” he adds. The announcement from Inphi is an important step in allowing system OEMs and optical module vendors to build next-generation 100GbE systems that are both 802.3ba-compliant and key to 100GbE’s success in the market, D’Ambrosia reckons.

“We are expecting strong growth in the 100GbE market, especially in the enterprise and data-center segments, with the advent of smaller-form-factor, lower-power 100G optical modules,” comments Jag Bolaria, senior analyst at The Linley Group. “When coupled with Inphi’s low-power, highly integrated CMOS 100G PHY products, the market’s move to high-density 100G systems will become a reality.”

The iPHY IN112510 is a single-chip, low-power PHY for 10:4 gearbox applications for 100GbE and OTU4 high-density 100G line-cards with 25-28Gbps electrical interfaces. Other technical features include:

• support for 100G BASE-LR4/ER4 and OTU4 28 Gbps operation for OTL4.4;
• optimized for extremely low-latency to allow use in ultra-low-latency applications;
• programmable transmit and adaptive receive equalization on all SerDes interfaces with fine granularity and control, allowing performance to surpass IEEE CAUI, CEI-11G SR and CEI-28G VSR specifications;
• self-test and loopback modes that allow diagnostic monitoring of channel and system parameters;
• eye-scan and monitor on all SerDes receiver interfaces for link margin and stress testing in a lab or production test environment;
• innovative package design that allows denser line-cards;
• optimizations for next-generation CFP2-based line-card designs; and
• single-chip low-power solution that allows next-generation optimized CFP modules.

The iPHY IN012525 is a low-power CDR for 100GbE and OTU4 next-generation 100G modules. The CDR features:

• support for 100G BASE-LR4/ER4 and OTU4 28Gbps operation;
• programmable transmit and adaptive receive equalization on all SerDes interfaces with fine granularity and control, allowing performance to surpass CEI-28G VSR specifications;
• self-test modes that allow diagnostic monitoring of channel and system parameters;
• eye-scan and monitor on all SerDes receiver interfaces for link margin and stress testing in a lab or production test environment; and
• optimizations for next-generation CFP2 modules.

Inphi also launched the IN2841TA, a transimpedance amplifier (TIA)/limiting amplifier (LIA) for 100GbE receivers. Interoperable with Inphi’s iPHY 100GbE CMOS SerDes solutions, the IN2841TA offers the lowest power, best sensitivity, and highest overload, it is claimed. Together, the IN2841TA and iPHY CMOS SerDes create a platform solution for 100GbE CFP and CFP2 modules.

Inphi showcased its latest next-generation products in at the European Conference on Optical Communication (ECOC 2011) in Geneva, Switzerland (19-21 September).

Tags: Inphi 100GbE CMOS PHY 100G line-cards

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