News

11 November 2010

 

SÜSS MicroTec and Fraunhofer IST launch aligner technology for selective surface treatment

Equipment and process solutions provider SÜSS MicroTec AG of Garching, near Munich, Germany, and Braunschweig-based Fraunhofer for Surface Engineering and Thin Films (IST) have announced the launch of SELECT, a bond aligner and mask aligner technology that selectively activates parts of a wafer surface through plasma treatment.

Local treatment of the surface prior to wafer processing can replace standard process steps and reduce the overall cost per wafer. Selective plasma activation can be applied to a variety of MEMS (micro-electro-mechanical system), optical and solar applications using direct wafer bonding or surface modification for the creation of micro mirror arrays, micro valves, sensors or micro fluidic channels. The SELECT toolkit is an upgrade option for SÜSS MicroTec’s MA/BA8 Gen3 manual mask and bond aligner.

Fraunhofer IST’s patent-pending technology is based on atmospheric pressure plasma selectively modifying the molecular level surface. Conventional surface treatment of complete wafers without selection can damage the functionality of micro components or electronics. With selective treatment it is possible to protect those sensitive areas by activating only specific parts of the wafer. Selective plasma activation is used with planar wafers as well as with wafers with topography, where plasma activation is provided either in the cavities or on the elevated structures.

“While selective plasma treatment in wafer bonding applications significantly reduces the post-bond anneal temperature from 1000°C down to 200°C, it also protects sensitive devices,” says Fraunhofer IST’s director professor Günter Bräuer. The technology therefore increases the process window for direct bonding. “With SÜSS MicroTec’s SELECT toolkit applied in both direct bonding as well as other wafer processing applications, a ground-breaking new approach seems possible for device processing in the semiconductor industry,” he reckons.

“The treatment of selected parts of wafers reduces the costs of producing a device through streamlining processes and increasing throughput at the same time,” explains SÜSS MicroTec’s president & CEO Frank Averdung. “The new technology has the potential to completely change the cost-of-ownership model for a large variety of applications,” he claims. “This creates an interesting opportunity for the customers of our latest manual mask aligner generation.”

Search: SÜSS MicroTec Bond aligner Mask aligner

Visit: www.ist.fraunhofer.de

Visit: www.suss.com

For more: Latest issue of Semiconductor Today