7 December 2010

Peregrine and Soitec announce bonded SOS substrate for RFICs

Peregrine Semiconductor Corp of San Diego, CA, USA, a provider of radio-frequency (RF) integrated circuits (ICs), and Soitec of Bernin, France— which manufactures engineered substrates including silicon-on-insulator (SOI) wafers and (through its Picogiga International division) III-V epiwafers — have announced the joint development and ramp in production of a new, bonded silicon-on-sapphire (SOS) substrate that has been qualified for use in manufacturing Peregrine’s next-generation STeP5 UltraCMOS SOS-based RF ICs.

Soitec says that its core direct wafer-bonding technologies and industrial know-how, combined with Peregrine’s legacy SOS process development and IC design expertise, enabled the rapid development of a tuned substrate that delivers the RF performance required by ever-advancing mobile wireless and industrial markets.

The new substrate is a bonded monocrystalline SOS substrate jointly engineered by the two firms. Soitec’s process expertise was used to transfer and bond a high-quality, monocrystalline thin silicon layer onto a sapphire substrate. It is claimed that the resulting bonded silicon layer offers improvements in transistor mobility and silicon quality beyond conventional SOS wafers, which use an epitaxially grown silicon layer. The new substrate provides Peregrine a design landscape for enhancements in RFIC performance, functionality, and form factor, enabling IC size reduction and performance increase by as much as 30%, says Soitec. It also enables Peregrine to continue its long-term strategy toward highly integrated RF front-end (RFFE) IC solutions in a substrate technology that matches the yield and scalability qualities of bulk silicon.

“Soitec’s impressive substrate expertise and industrial capabilities enabled us to meet our vision for next-generation UltraCMOS processing,” says Mark Miscione, Peregrine’s VP, RF Technology Solutions. “This achievement has provided the opportunity to exploit even greater RF performance in our products. We look forward to continuing our collaboration and exploring new opportunities together with Soitec,” he adds.

“In just two years we were able to move from the feasibility phase to a mature product ready for industrialisation and production ramp,” says Bernard Aspar, general manager of Soitec’s Tracit business unit (which provides thin-film layer transfer technologies used to manufacture substrates for power ICs and microsystems, as well as generic circuit transfer technology, Smart Stacking for applications such as image sensors and 3D integration). “This is an excellent example of how our core technologies can extend to new applications and markets, where there is always a need for more functionality at the substrate level.”

Tags: Peregrine Semiconductor Soitec SOS substrate

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