News

12 June 2009

 

HRL receives Phase II COSMOS contract from DARPA

HRL Laboratories LLC of Malibu, CA, USA (a corporate R&D lab owned by The Boeing Company and General Motors) has received an 18-month Phase II contract from the US Defense Advanced Research Projects Agency (DARPA) to continue its work on the program Compound Semiconductor Materials on Silicon (COSMOS).

The goal of the DARPA/Air Force Research Laboratory program is to develop new methods to tightly integrate compound semiconductor technologies with CMOS (complementary metal-oxide semiconductor) circuits in order to achieve higher levels of circuit performance. The program targets high-dynamic-range (16 bit), high-bandwidth (500MHz), analog-to-digital conversion for challenging RF receiver applications, such as communications, radar and sensor systems.

After beginning in 2007 with an initial Phase I DARPA contract, last December at the IEEE’s International Electron Device Meeting (IEDM 2008) HRL announced that it had successfully integrated silicon CMOS with indium phosphide (InP) double heterojunction bipolar transistors (DHBTs). The Phase I goal was to develop and demonstrate a viable process to integrate the two disparate materials silicon and InP which, when combined effectively, can dramatically improve linearity, dynamic range and bandwidth, according to HRL’s COSMOS program manager Dr Ken Elliot.

“The new HRL technology also offers outstanding overlay accuracy, solves thermal expansion and stress issues, and maximizes connectivity between CMOS and InP transistors,” Elliott adds. “No electrical degradation of the CMOS or InP HBT devices has been observed.”

In addition, the integration process is fully compatible with the device and interconnect scaling needed for future technology generations, with the added benefits of a less costly growth path and shorter time to market than potential alternative technologies, HRL reckons.

HRL says that the COSMOS technology could also represent the beginning of a paradigm shift for other materials and devices that should offer benefits if integrated with CMOS (e.g. enabling a more rapid development cycle for advanced systems-on-a-chip and emerging technologies). The development should result in higher bandwidth and lower-distortion signals for optical and RF communications.

Phase II of the program will focus on significantly improving both the yield and density of the heterogeneous interconnect process using HRL’s 400GHz, 250nm InP HBT process combined with commercial 130nm CMOS. The program has a target of producing a 500MHz-bandwidth digital-to-analog converter with 13-bit dynamic range at the rated bandwidth.

See related item:

Raytheon awarded $6.5m for integration of compound semiconductors on CMOS silicon

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