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Researchers from Technische Universität Berlin in Germany and Istanbul University in Turkey have developed quantum dot (QD) memory structures with writing times of the order of 10ns (Geller et al, Appl. Phys. Lett. 92, 092108, 2008). One QD structure had a write time as low as 6ns while another arrangement was somewhat slower at 14ns. Presently the devices are limited by the experimental setup and by the parasitic RC cut-off frequencies of the devices. The researchers hope to be able to use the concept to achieve even faster write times, based on the charge carrier relaxation time being of the order of picoseconds.

These QD memory write speeds compare extremely favorably with those of Flash memories, which take of the order of tens of milliseconds. While DRAM writes in nanoseconds, it needs to be constantly reminded of the information it contains, since its retention is of the order of milliseconds. For non-volatile memory, one needs retentions of the order of 10-20 years or better to beat Flash and meet industry requirements.

The fastest memory device was constructed from indium arsenide (InAs) QDs embedded in a p-doped gallium arsenide (GaAs) layer, while the other was based on gallium antimonide (GaSb) embedded in GaAs. An n-doped GaAs layer is then deposited on top of the QDs. Changing the voltage across the device allows the dots to become charged or to be discharged, giving the different memory states. The capacitance of the device depends on the charge level on the QDs, giving the read mechanism. These mechanisms are similar to those of Flash memory, but there is hope that QD-based memory will be more robust in terms of memory retention and long-term reliability.

The QDs measure about 15nm across. The estimated possible storage density of such devices is about 1TByte (1000GB)/inch² (~160Gbits/cm²). The International Technology Roadmap for Semiconductors (ITRS 2007) puts the expected density for this year of DRAM ‘at production’ at 3Gbits/cm², while in 2015 it is expected to reach 15Gbits/cm². Flash memory densities in 2008 are expected to be of the order of 8Gbits/cm 2 for single memory level cell devices and 17Gbit/cm² for two-level cells. The 2015 figures are 40Gbit/cm² and 90Gbit/cm², respectively.

A commercial QD memory would be competing with developing ferroelectric, magnetic and phase-change memory technologies, in addition to established Flash devices. Phase-change memories have perhaps been the most popular alternative to develop in recent years, with possible commercial devices expected soon. They use similar technology to that used in rewritable optical disks (CD, DVD), but using electrical rather than optical writing and reading mechanisms. Its write speed (the time needed to create the phase-change) is around 10ns.

This February, Intel and STMicroelectronics announced that they were sampling prototype 128Mbit phase-change memory devices produced on a 90nm silicon process. These companies expect a rapid scaling to be possible to higher densities compared with traditional Flash devices, which are due to run into some physical limitations to further progress in the next few years. Phase-change memory cell sizes are presently given in the ITRS as 13,000 or 50,000nm², depending on structure, translating to densities of the order 7Gbit/cm² or 2Gbit/cm², respectively. By 2015, densities could reach 200Gbit/cm².

Apart from the development competition, there is also the struggle to create a commercial product from a laboratory proof-of-concept. To fend off the alternatives, this needs financial resources, development of a low-cost, high-yield, extendible, manufacturable process, industry partners and luck.

Picture: Schematic of InAs QD memory (taken from Technische Universität Berlin presentation given last year).

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Search: Quantum dot InAs GaSb GaAs

Visit: http://link.aip.org/link/?APPLAB/92/092108/1

Visit: http://sol.physik.tu-berlin.de

The author Mike Cooke is a freelance technology journalist who has worked in the semiconductor and advanced technology sectors since 1997.